At the point when a Control Word is kept in touch with a Counter, all Control Logic is promptly reset and OUT goes to a known introductory express; no CLK beats are expected for this.
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The GATE input is constantly examined on the rising edge of CLK. In Modes 0, 2, 3, and 4 the GATE input is level touchy, and the rationale level is examined on the rising edge of CLK. In Modes 1, 2, 3, and 5 the GATE input is rising-edge delicate. In these Modes, a rising edge of GATE (trigger) sets an edge-delicate flip-flop in the Counter. This flip-flop is then inspected on the following rising edge of CLK; the flip-flop is reset following it is examined. Along these lines, a trigger will be identified regardless of when it happens a high rationale level doesn’t need to be kept up with until the following rising edge of CLK.
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Note that in Modes 2 and 3, the GATE input is both edge and level-touchy. In Modes 2 and 3, assuming a CLK source other than the framework clock is utilized, GATE ought to be beat quickly following WR of another count esteem.
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New counts are stacked and Counters are decremented on the falling edge of CLK. The biggest conceivable introductory count is 0, this is identical to 2 16 for paired counting and 104 for BCD counting. The Counter doesn’t stop when it arrives at nothing. In Modes 0, 1, 4, and 5 the Counter “folds over” to the most elevated count, either FFFF hex for parallel counting or 9999 for BCD counting, and counts. Modes 2 and 3 are intermittent; the Counter reloads itself with the underlying count and counts from that point.
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